this is information on a product in full production. december 2016 docid029041 rev 4 1/255 stm32f765xx stm32f767xx stm32f768ax stm32f769xx arm ? -based cortex ? -m7 32b mcu+fpu, 462dmips, up to 2mb flash/512+16+4kb ram, usb otg hs/fs, ethernet, 18 tims, 3 adcs, 28 com itf, cam, lcd, dsi datasheet - production data features ? core: arm ? 32-bit cortex ? -m7 cpu with dpfpu, art accelerator ? and l1-cache: 16 kbytes i/d cache, allowing 0-wait state execution from embedded flash and external memories, up to 216 mhz, mpu, 462 dmips/2.14 dmips/mhz (dhrystone 2.1), and dsp instructions. ? memories ? up to 2 mbytes of flash memory organized into two banks allowing read-while-write ? sram: 512 kbytes (including 128 kbytes of data tcm ram for critical real-time data) + 16 kbytes of instruction tcm ram (for critical real-time routines) + 4 kbytes of backup sram ? flexible external memory controller with up to 32-bit data bus: sram, psram, sdram/lpsdr sdram, nor/nand memories ? dual mode quad-spi ? graphics ? chrom-art accelerator ? (dma2d), graphical hardware accelerator enabling enhanced graphical user interface ? hardware jpeg codec ? lcd-tft controller supporting up to xga resolution ? mipi ? dsi host controller supporting up to 720p 30 hz resolution ? clock, reset and supply management ? 1.7 v to 3.6 v application supply and i/os ? por, pdr, pvd and bor ? dedicated usb power ? 4-to-26 mhz crystal oscillator ? internal 16 mhz factory-trimmed rc (1% accuracy) ?32 khz oscillator for rtc with calibration ? internal 32 khz rc with calibration ? low-power ? sleep, stop and standby modes ?v bat supply for rtc, 3232 bit backup registers + 4 kbytes backup sram ? 312-bit, 2.4 msps adc: up to 24 channels ? digital filters for sigma delta modulator (dfsdm), 8 channels / 4 filters ? 212-bit d/a converters ? general-purpose dma: 16-stream dma controller with fifos and burst support ? up to 18 timers: up to thirteen 16-bit (1x low- power 16-bit timer available in stop mode) and two 32-bit timers, each with up to 4 ic/oc/pwm or pulse counter and quadrature (incremental) encoder input. all 15 timers running up to 216 mhz. 2x watchdogs, systick timer ? debug mode ? swd & jtag interfaces ? cortex ? -m7 trace macrocell ? ? up to 168 i/o ports with interrupt capability ? up to 164 fast i/os up to 108 mhz ? up to 166 5 v-tolerant i/os lqfp100 (14 14 mm) ufbga176 (10 x 10 mm) & |